First Posted March 21, 2008
This is going to be one fun project. I am
going to do MIDI over Ethernet. The main purpose is so that I can
have MIDI to CV converters for my home made synthesizers. But I
am sure there are many applications of this. Ethernet is not
exactly the easiest thing to deal with, but over the last couple of
months I have discovered it is really not any where near as bad as I
thought. At work, I was tasked with creating an FTP client that
runs on a micro controller ( An ATmega128 to be exact). I ended
up using Ethernut from Egnite.
This is a cute little board that has quite a bit of capability.
The learning curve on using sockets was a little steep, but I am
somewhat comfortable with it now.
But here is the BIG rub. I have no desire to
write a Windows Device driver for a Midi port. I am sure it is no
more difficult than using sockets, but there is only just so much that
you can do. My plan is to use a virtual midi port that will then
be connected to the ethernet by a server that I will write myself.
Probably not quite as elegant, but it should get the job done.
As I get this stuff going, I will post it. I plan on making everything open source.
January 15, 2009
Ethernut 2.1b CPLD verilog code
Ok, this does not nessesarily have anything to do with going from
Ehternet to Midi....but, since I am using the Ethernut and this has to
do with that...I will post it here.
I created my own AVR board that had an FPGA on it to do a job.
And, it uses the Ethernut OS, and the board itself is similar to
the Ethernut 2.1b board. I wish I could share that project with
everybody...but I can't. I am working on my own board for here at
home which will use a Xilinx FPGA, probably an XC3S50A. But that
will be a ways off.
I mentioned my project at
work on the Ethernut forum, and I was asked if I could contribute the
verilog code to the ethernut project, since the CPLD on the 2.1b board
is only in schematic form. Well, I couldn't do that, but I could
write a new peice of code that would exactly duplicate what the
schematic does. And here it is.
of January 15, 2009, this code has yet to be tested. I am not
sure when I will be able to get around to that...soon, I hope.
This is a complete project. It was done using ISE webpack
version 9.1. Yeah...I am a couple of version back, but that is
because I have EDK 9.1...and the two have to stick together.
Verilog Project for Ethernut 2.1b (Cpld Version 0.01) ISE 9.1
Enjoy...and if somebody verifies this befor me...let me know.